Field effect transistors (FETs) are widely used in the electronics industry for a variety of applications related to both analog and digital electrical signals. One of the most common FETs is a metal-oxide-semiconductor field effect transistor (MOSFET). MOSFETs generally have a metal or polycrystalline silicon gate contact or electrode that is biased to create an electric field in an underlying channel between source and drain regions of a semiconductor substrate. The electric field inverts the channel and enables a current to flow between the source region and the drain region. A gate dielectric typically separates the channel region from the gate electrode. In prior art transistor structures, the gate dielectric is typically silicon dioxide (SiO2).
However, as integrated circuit transistors have become smaller, the thickness of the dielectric materials in the gate structure has become thinner. Recent efforts directed to MOS device scaling accordingly have focused on dielectric materials having dielectric constants greater than that of SiO2. As a result of higher physical gate dielectric thickness, these materials, commonly known as high-k dielectric materials, reduce gate current leakage compared to that of equivalent SiO2 or nitrided SiO2 while keeping the overall capacitance density to the required equivalent SiO2 thickness.
Referring to FIG. 1, MOSFET gate structures 100 typically are formed by depositing a dielectric material 102 on a semiconductor substrate 104 and depositing gate electrode material 106 on the dielectric material. A photoresist 108 then is formed on the gate electrode material and is patterned by conventional photolithography. Once patterned, the photoresist serves as an etch mask during the etching of the gate electrode material 106 and, optionally, the dielectric material 102. Commercial photoresists are polymeric coatings that are designed to change properties upon exposure to light during a photolithography process. Then, either the exposed or unexposed regions of the coating can be selectively removed to reveal the substrate beneath.
After formation of the gate structure, the photoresist then is removed by an ashing process, which typically includes exposure to oxygen-based plasmas. However, oxygen-based plasmas often result in damage to high-k dielectric material-comprising gate structures. As illustrated in FIG. 2, an oxygen-based plasma process creates atomic oxygen, which can readily diffuse to the high-k dielectric material/substrate interface and the gate electrode/high-k dielectric material interface and form regrown silicon oxide 110. This diffused oxygen and regrown silicon oxide can severely degrade device characteristics and performance of the MOSFET.
Hydrogen-based plasma (“H-plasma”) processes have been used to circumvent the damage caused by oxygen-based plasma processes. In H-plasma processes, the photoresist is exposed to H-plasma at temperatures at or below 350° C. Exposure of the gate electrode structure to the H-plasma results in a sputtering process whereby photoresist particles are physically “knocked” off the gate structure. However, as illustrated in FIG. 3, such physical sputtering also may result in “clipping” 114 of the exposed corners of the gate electrode 106, which degrades the gate electrode profile. In addition, prior art H-plasma processes can result in chemical etching 112 of silicon-containing materials, such as a silicon-containing substrate 104 and polycrystalline silicon-containing gate electrode 106, due to the generation of silane (SiH4).
Accordingly, it is desirable to provide a method for removing photoresist from a semiconductor gate structure having a high-k dielectric material layer without substantial oxidation at the high-k dielectric material layer interfaces. In addition, it is desirable to provide a method for removing photoresist from a semiconductor structure while minimizing damage to the semiconductor structure. Furthermore, other desirable features and characteristics of the present invention will become apparent from the subsequent detailed description of the invention and the appended claims, taken in conjunction with the accompanying drawings and this background of the invention.